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binarytobcd
- 实现二进制到BCD的转换,相关算法可参考相关文档资料-convert binary number to BCD
DESHTM
- 用VHDL语言实现了DES加密算法，其中包含了测试程序，能够进行仿真。-Using VHDL language implementation of the DES encryption algorithm, which contains the test procedures can be simulated.
DES_IP
- 有效的改进3-DES算法的执行速度，采用了多级流水线技术，设计了一种高速的硬件结构，使得原来需要48个时钟周期才能完成的运算，现在只需要一个时钟周期就可以完成。另外通过增加输入/输出的控制信号。使得该IP可以方便的集成到SOC中，大大缩短了SOC的设计周期。-Effective 3-DES algorithm to improve the implementation of speed, multi-stage pipeline technology, designed a high-speed
VHDLprogram
- 含有各类寄存器，AD和DA转换器，各种算法，有限状态机，还些许组合逻辑电路设计代码-Containing various types of registers, AD and DA converters, a variety of algorithms, finite state machine, but also some combinational logic circuit design code
CordicNCO
- 基于CORDIC算法的，数字控制振荡器的设计。带测试程序，输入一个振荡频率，输出SIN和COS的波形！-Based on the CORDIC algorithm, the digital controlled oscillator design. With test procedures, enter a oscillation frequency, the output waveform SIN and COS!
video_compression
- 用VHDL实现的视频压缩算法，希望大家学习学习-Using VHDL implementation of video compression algorithms, study study hope that everyone
dds
- dds算法的fpga实现 altera 根据不同设置，输出不同频率的信号源-dds algorithm to achieve fpga set according to different altera, the output of the signal source at different frequencies
cordiccos
- cordic算法的fpga的实现 采用altera芯片-cordic realization algorithm using fpga chip altera
sha
- sha加密算法实现，经过FPGA验证的！-sha encryption algorithm, after FPGA validation!
restoring
- restoring除法器设计 经典算法了，可以仿真通过-divider restoring a classical algorithm design, simulation can be adopted
svc_timer33ms
- Verilog 下脉冲发生器的源代码，可用于模拟三相交流电过零点，主要用于调试一些类似SVC（无功补偿）控制器的一些算法-Pulse generator under the Verilog source code, can be used to simulate three-phase alternating current zero-crossing point, mainly for debugging similar SVC (reactive power compensation) co
H_264_Baseline_Profile
- 一篇介绍H.264基线规范算法实现的论文-Introduced an algorithm H.264 baseline specification of the paper
butterfly-verilog
- VHDL的DCT变换.蝶型算法,很好用的,希望能有帮助-The DCT transform VHDL. Butterfly algorithm, very good with the hope that it can be helpful
case4
- DA算法中的使用的查找表模块，本程序先设计查找表，然后设计4*4DA算法模块，之后进行位扩展和字扩展得到32阶滤波器程序.附带4各表，和FIR滤波器序数-DA algorithm used in the lookup table module, the design of the program first look-up table, and then design 4* 4DA algorithm module, after the word-bit expansion and extens
QAM
- 以QAM系统设计为例——介绍在FPGA中实现DSP算法-QAM system as an example to the design- introduced in the realization of DSP algorithms in FPGA
FPGA_FFT
- 基于VHDL语言的一个FFT快速傅里叶变换程序。采用4蝶形算法-VHDL language based on a FFT Fast Fourier Transform procedure. 4 butterfly algorithm used
DES
- DES算法的FPGA实现 希望能有用 。-DES algorithm can be useful to achieve the desired FPGA
median_filterCode
- 采用快速中指滤波算法实现图像的中值滤波，使用VHDL语言ISE环境-Image Median Filter
qpsk
- 基于vhdl的qpsk算法研究与性能测试-Qpsk of vhdl-based research and performance testing algorithm
DES
- DES加密算法的VHDL实现,采用流水线技术实现-The VHDL implement of DES encrypt algorithmic